supertex inc. hv9961 supertex inc. 1235 bordeaux drive, sunnyvale, ca 94089 tel: 408-222-8888 www.supertex.com features fast average current control programmable constant off-time switching linear dimming input pwm dimming input output short circuit protection with skip mode ambient operating temperature -40 o c to +125 o c pin-compatible with the hv9910b applications dc/dc or ac/dc led driver applications led backlight driver for lcd displays general purpose constant current source led signage and displays architectural and decorative led lighting led street lighting ?? ? ? ? ? ? ? ? ? ? ? ? general description the hv9961 is an average current mode control led driver ic operating in a constant off-time mode. unlike hv9910b, this control ic does not produce a peak-to-average error, and therefore greatly improves accuracy, line and load regulation of the led current without any need for loop compensation or high-side current sensing. the output led current accuracy is 3%. the ic is equipped with a current limit comparator for hiccup- mode output short circuit protection. the hv9961 can be powered from an 8.0 - 450v supply. a pwm dimming input is provided that accepts an external control ttl compatible signal. the output current can be programmed by an internal 275mv reference, or controlled externally through a 0 - 1.5v dimming input. hv9961 is pin-to-pin compatible with hv9910b and it can be used as a drop-in replacement for many applications to improve the led current accuracy and regulation. typical application circuit led driver with average-mode constant current control 1 4 2 8 5 6 7 3 hv9961 vin gate pwmd ld vdd rt cs gnd led load sets led current 8.0 - 450vdc r cs r t downloaded from: http:///
2 hv9961 supertex inc. 1235 bordeaux drive, sunnyvale, ca 94089 tel: 408-222-8888 www.supertex.com -g indicates package is rohs compliant (green)absolute maximum ratings stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. these are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the speci?cations is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. parameter value v in to gnd -0.5v to +470v v dd to gnd 12v cs, ld, pwmd, gate, rt to gnd -0.3v to (v dd +0.3v) junction temperature range -40c to +150c storage temperature range -65c to +150c continuous power dissipation (t a = +25c) 8-lead soic16-lead soic 650mw 1000mw sym description min typ max units conditions input v indc input dc supply voltage range 1 * 8.0 - 450 v dc input voltage i insd shut-down mode supply current * - 0.5 1.0 ma pin pwmd to gnd ordering information device package options 8-lead soic 4.90x3.90mm body 1.75mm height (max) 1.27mm pitch 16-lead soic 9.90x3.90mm body 1.75mm height (max) 1.27mm pitch hv9961 hv9961lg-g HV9961NG-G 12 3 4 5 6 7 8 1615 14 13 12 11 10 9 87 6 5 12 3 4 vin cs gnd gate rtld vdd pwmd vin ncnc cs gnd ncnc gate ncnc rt ld vdd nc nc pwmd pin descriptionproduct marking y = last digit of year sealed ww = week sealed l = lot number = green packaging yww h9961 llll y = last digit of year sealed ww = week sealed l = lot number c = country of origin* a = assembler id* = green packaging *may be part of top marking top marking bottom marking hv9961ng yww llllllll ccccccccc aaa 8-lead soic (lg) 16-lead soic (ng) 8-lead soic (lg) 16-lead soic (ng) electrical characteristics (speci?cations are at t a = 25c. v in = 12v, v ld = v dd , pwmd = v dd unless otherwise noted)) thermal resistance package ja 8-lead soic 128 o c/w 16-lead soic 82 o c/w package may or may not include the following marks: si or package may or may not include the following marks: si or notes: 1. also limited by package power dissipation limit, whichever is lower. * denotes the speci?cations which apply over the full operating ambient temperature range of -4 0c < t a < +125c. downloaded from: http:///
3 hv9961 supertex inc. 1235 bordeaux drive, sunnyvale, ca 94089 tel: 408-222-8888 www.supertex.com sym description min typ max units conditions internal regulator v dd internally regulated voltage - 7.25 7.50 7.75 v v in = 8.0v, i dd(ext) = 0, 500pf at gate; r t = 226k? v dd, line line regulation of v dd - 0 - 1.0 v v in = 8.0 - 450v, i dd(ext) = 0, 500pf at gate; r t = 226k? v dd, load load regulation of v dd - 0 - 100 mv i dd(ext) = 0 - 1.0ma, 500pf at gate; r t = 226k? uvlo v dd undervoltage lockout threshold * 6.45 6.70 6.95 v v in rising ?uvlo v dd undervoltage lockout hysteresis - - 500 - mv v in falling i in,max maximum input current (limited by uvlo) # 3.5 - - ma v in = 8.0v, t a = 25 o c # 1.5 - - v in = 8.0v, t a = 125 o c pwm dimming v en(lo) pwmd input low voltage * - - 0.8 v v in = 8.0 - 450v v en(hi) pwmd input high voltage * 2.2 - - v v in = 8.0 - 450v r en internal pull-down resistanceat pwmd - 50 100 150 k? v pwmd = 5.0v average current sense logic v cs current sense reference voltage - 268 - 286 mv --- a v(ld) ld-to-cs voltage ratio - 0.182 - 0.188 - --- av ld(offset) ld-to-cs voltage offset - 0 - 10 mv offset = v cs - a v(ld) ? v ld ; v ld = 1.2v - cs threshold temp regulation * - - 5.0 mv --- v ld(off) ld input voltage, shutdown - - 150 - mv v ld falling v ld(off) ld input voltage, enable - - 200 - mv v ld rising t blank current sense blanking interval * 150 - 320 ns --- t on(min) minimum on-time - - - 1000 ns cs = v cs +30mv d max maximum steady-state duty cycle - 75 - - % reduction in output led current may occur beyond this duty cycle short circuit protection v cs hiccup threshold voltage - 410 - 470 mv --- t delay current limit delay cs-to-gate - - - 150 ns cs = v cs +30mv t hiccup short circuit hiccup time - 350 - 550 s --- t on(min) minimum on-time (short circuit) - - - 430 ns cs = v dd notes: * denotes the speci?cations which apply over the full operating ambient temperature range of -40c < t a < +125c. # guaranteed by design. electrical characteristics (speci?cations are at t a = 25c. v in = 12v, v ld = v dd , pwmd = v dd unless otherwise noted)) downloaded from: http:///
4 hv9961 supertex inc. 1235 bordeaux drive, sunnyvale, ca 94089 tel: 408-222-8888 www.supertex.com functional block diagram sym description min typ max units conditions t off timer t off off time - 32 40 48 s r t = 1.00m? - 8.0 10 12 r t = 226k? gate driver i source gate sourcing current - 0.165 - - a v gate = 0v, v dd = 7.5v i sink gate sinking current - 0.165 - - a v gate = v dd , v dd = 7.5v t rise gate output rise time - - 30 50 ns c gate = 500pf, v dd = 7.5v t fall gate output fall time - - 30 50 ns c gate = 500pf, v dd = 7.5v notes: * denotes the speci?cations which apply over the full operating ambient temperature range of -40c < t a < +125c. # guaranteed by design. electrical characteristics (speci?cations are at t a = 25c. v in = 12v, v ld = v dd , pwmd = v dd unless otherwise noted)) cs rs q q t off timer l /e blanking gate 0.44v min (v ld ? 0.185, 0.275v) ld 400s pwmd rt gnd current mirror i regulator vin vdd uvlo por 0.15/0.20v average current control logic out auto-ref hv9961 clk in downloaded from: http:///
5 hv9961 supertex inc. 1235 bordeaux drive, sunnyvale, ca 94089 tel: 408-222-8888 www.supertex.com general descriptionpeak-current control (as in hv9910b) of a buck converter is the most economical and simple way to regulate its output current. however, it suffers accuracy and regulation prob- lems that arise from the so-called peak-to-average current error, contributed by the current ripple in the output inductor and the propagation delay in the current sense compara- tor. the full inductor current signal is unavailable for direct sensing at the ground potential in a buck converter when the control switch is referenced to the same ground poten- tial because the control switch is only conducting for small periods. while it is very simple to detect the peak current in the switch, controlling the average inductor current is usu- ally implemented by level translating the sense signal from +v in . though this is practical for relatively low input voltage v in , this type of average-current control may become exces- sively complex and expensive in the of?ine ac or other high- voltage dc applications. the hv9961 employs supertex proprietary control scheme, achieving fast and very accurate control of average current in the buck inductor through sensing the switch current only. no compensation of the current control loop is required. the led current response to pwmd input is similar to that of the hv9910b. the inductor current ripple amplitude does not af- fect this control scheme signi?cantly, and therefore, the led current is independent of the variation in inductance, switch- ing frequency or output voltage. constant off-time control of the buck converter is used for stability and to improve the led current regulation over a wide range of input voltages. (note that, unlike hv9910b, the hv9961 does not support the constant-frequency mode of operation.) off timer the timing resistor connected to rt determines the off-time of the gate driver, and it must be wired to gnd. (wiring this resistor to gate as with hv9910b is no longer supported.) the equation governing the off-time of the gate output is given by: t off (s) = r t (k) + 0.3 (1) 25 within the range of 30k r t 1.0m. average current control feedback and output short circuit protection the current through the switching mosfet source is aver- aged and used to give constant-current feedback. this cur- rent is detected using a sense resistor at the cs pin. the feedback operates in a fast open-loop mode. no compensa- tion is required. output current is programmed simply as: i led = 0.275v (2) r cs when the voltage at the ld input v ld 1.5v. otherwise: i led = v ld ? 0.185 (3) r cs the above equations are only valid for continuous conduc- tion of the output inductor. it is a good practice to design the inductor such that the switching ripple current in it is 30~40% of its average peak-to-peak, full load, dc current. hence, the recommended inductance can be calculated as: l o = v o(max) ? t off (4) 0.4 ? i o the duty-cycle range of the current control feedback is lim- ited to d 0.75. a reduction in the led current may occur when the led string voltage v o is greater than 75% of the input voltage v in of the hv9961 led driver. reducing the output led voltage v o below v o(min) = v in ? d min , where d min = 1.0s/(t off +1.0s), may also result in the loss of regulation of the led current. this condition, however, causes an increase in the led current and can potentially trip the short-circuit protection comparator. the typical output characteristic of the hv9961 led driver is shown in fig.1. the corresponding hv9910b characteristic is given for the comparison. fig.1. typical output characteristic of an hv9961 led driver. application information v in = 170vdc hv9961 hv9910b 0 10 20 30 40 50 60 0.600.55 0.50 0.45 0.40 0.35 0.30 0.25 led current (a) output voltage (v) output characteristics downloaded from: http:///
6 hv9961 supertex inc. 1235 bordeaux drive, sunnyvale, ca 94089 tel: 408-222-8888 www.supertex.com the short circuit protection comparator trips when the volt- age at cs exceeds 0.44v. when this occurs, the gate off- time t hiccup = 400s is generated to prevent stair-casing of the inductor current and potentially its saturation due to insuf?cient output voltage. the typical short-circuit current is shown in the waveform of fig. 2. fig.2. short-circuit inductor current. a leading-edge blanking delay is provided at cs to prevent false triggering of the current feedback and the short circuit protection. linear dimming when the voltage at ld falls below 1.5v, the internal 275mv reference to the constant-current feedback becomes over- ridden by v ld ? 0.185. as long as the current in the inductor remains continuous, the led current is given by the equa- tion (3) above. however, when v ld falls below 150mv, the gate output becomes disabled. the gate signal recovers, when v ld exceeds 200mv. this is required in some applica- tions to be able to shut the led lamp off with the same signal input that controls the brightness. the typical linear dimming response is shown in fig.3. fig.3. typical linear dimming response of an hv9961 led driver the linear dimming input could also be used for mixed- mode dimming to expand the dimming ratio. in such case a pulse-width modulated signal of a measured amplitude be- low 1.5v should be applied at ld. input voltage regulator the hv9961 can be powered directly from an 8.0 ~ 450vdc supply through its vin input. when this voltage is applied at the vin pin, the hv9961 maintains a constant 7.5v level at vdd. this voltage can be used to power the ic and external circuitry connected to vdd within the rated maximum cur- rent or within the thermal ratings of the package, whichever limit is lower. the vdd pin must be bypassed by a low esr capacitor to provide a low impedance path for the high fre- quency current of the gate output. the hv9961 can also be powered through the vdd pin directly with a voltage greater than the internally regulated 7.5v, but less than 12v. despite the instantaneous voltage rating of 450v, continu- ous voltage at vin is limited by the power dissipation in the package. for example, when hv9961 draws i in = 2.0ma from the vin input, and the 8-pin soic package is used, the maximum continuous voltage at vin is limited to: v in(max) = (t j(max) - t a ) = 390v (5) r ,j-a ? i in where the ambient temperature t a = 25 o c, the maximum working junction temperature t j(max) = 125 o c, the junction- to-ambient thermal resistance r ,ja = 128 o c/w. in such cases, when it is needed to operate the hv9961 from a higher voltage, a resistor or a zener diode can be added in series with the vin input to divert some of the power loss from the hv9961. in the above example, using a 100v zener diode will allow the circuit to work up to 490v. the input current drawn from the vin pin is represented by the following equation: i in 1.0ma + q g ? f s (6) in the above equation, f s is the switching frequency, and q g is the gate charge of the external fet obtained from the manufacturers datasheet. gate output the gate output of the hv9961 is used to drive an external mosfet. it is recommended that the gate charge q g of the external mosfet be less than 25nc for switching frequen- cies 100khz and less than 15nc for switching frequencies >100khz. 400s 0.44v/r cs 0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 0.400.35 0.30 0.25 0.20 0.15 0.10 0.05 0 led current (a) ld (v) ld response characteristics downloaded from: http:///
7 hv9961 supertex inc. 1235 bordeaux drive, sunnyvale, ca 94089 tel: 408-222-8888 www.supertex.com pwm dimming due to the fast open-loop response of the average-current control loop of the hv9961, its pwm dimming performance nearly matches that of the hv9910b. the inductor current waveform comparison is shown in fig. 4. fig.4. typical pwm dimming response of an hv9961 led driver. [ch2 (red): pwmd; ch4 (green): inductor current; ch3 (blue): same as hv9910b for comparison] the rising and falling edges are limited by the current slew rate in the inductor. the ?rst switching cycle is terminated upon reaching the 275mv (v ld ? 0.185) level at cs. the cir- cuit is further reaching its steady-state within 3~4 switching cycles regardless of the switching frequency. pin description pin # function description 8-lead soic 16-lead soic 1 1 vin this pin is the input of an 8.0 - 450v linear regulator. 2 4 cs this pin is the current sense pin used to sense the fet current by means of an external sense resistor. 3 5 gnd ground return for all internal circuitry. this pin must be electrically con- nected to the ground of the power train. 4 8 gate this pin is the output gate driver for an external n-channel power mosfet. 5 9 pwmd this is the pwm dimming input of the ic. when this pin is pulled to gnd, the gate driver is turned off. when the pin is pulled high, the gate driver operates normally. 6 12 vdd this is the power supply pin for all internal circuits. it must be bypassed with a low esr capacitor to gnd (at least 0.1f). 7 13 ld this pin is the linear dimming input, and it sets the current sense thresh- old as long as the voltage at this pin is less than 1.5v. if voltage at ld falls below 150mv, the gate output is disabled. the gate signal recovers at 200mv at ld. 8 14 rt a resistor connected between this pin and gnd programs the gate off- time. - 2, 3, 6, 7, 10, 11, 15, 16 nc no connection downloaded from: http:///
8 hv9961 supertex inc. 1235 bordeaux drive, sunnyvale, ca 94089 tel: 408-222-8888 www.supertex.com 8-lead soic (narrow body) package outline (lg) 4.90x3.90mm body, 1.75mm height (max), 1.27mm pitch 1 8 seating plane gauge plane l l1 l2 e e1 d e b a a2 a1 seating plane a a top view side view view b view b 1 note 1 (index area d/2 x e1/2) view a-a h h note 1 symbol a a1 a2 b d e e1 e h l l1 l2 1 dimension (mm) min 1.35* 0.10 1.25 0.31 4.80* 5.80* 3.80* 1.27 bsc 0.25 0.40 1.04 ref 0.25 bsc 0 o 5 o nom - - - - 4.90 6.00 3.90 - - - - max 1.75 0.25 1.65* 0.51 5.00* 6.20* 4.00* 0.50 1.27 8 o 15 o jedec registration ms-012, variation aa, issue e, sept. 2005. * this dimension is not speci?ed in the jedec drawing. drawings are not to scale. supertex doc. #: dspd-8solgtg, version i041309. note: this chamfer feature is optional. a pin 1 identi?er must be located in the index area indicated. the pin 1 identi?er can be: a molded mark/identi?er; an embedded metal marker; or a printed indicator. 1. downloaded from: http:///
supertex inc. does not recommend the use of its products in life support applications, and will not knowingly sell them for use in such applications unless it receive s an adequate product liability indemnification insu rance agreement. supertex inc. does not assume responsibility for use of devices described, and limits its liability to the replacement of the devices determined defect ive due to workmanship. no responsibility is assume d for possible omissions and inaccuracies. circuitr y and specifications are subject to change without notice . for the latest product specifications refer to th e supertex inc. (website: http//www.supertex.com) ?2010 supertex inc. all rights reserved. unauthorized use or reproduct ion is prohibited. supertex inc. 1235 bordeaux drive, sunnyvale, ca 94089 tel: 408-222-8888 www.supertex.com 9 hv9961 (the package drawing(s) in this data sheet may not re?ect the most current speci?cations. for the la test package outline information go to http://www.supertex.com/packaging.html .) doc.# dsfp-hv9961b101510 16-lead soic (narrow body) package outline (ng) 9.90x3.90mm body, 1.75mm height (max), 1.27mm pitch symbol a a1 a2 b d e e1 e h l l1 l2 1 dimension (mm) min 1.35* 0.10 1.25 0.31 9.80* 5.80* 3.80* 1.27 bsc 0.25 0.40 1.04 ref 0.25 bsc 0 o 5 o nom - - - - 9.90 6.00 3.90 - - - - max 1.75 0.25 1.65* 0.51 10.00* 6.20* 4.00* 0.50 1.27 8 o 15 o jedec registration ms-012, variation ac, issue e, sept. 2005. * this dimension is not speci?ed in the jedec drawing. drawings are not to scale. supertex doc. #: dspd-16song, version g041309. d seating plane gauge plane l l1 l2 top view side view view a-a view b view b 1 e1 e a a2 a1 a a seating plane e b h h 16 1 note 1 note 1 (index area d/2 x e1/2) note: this chamfer feature is optional. if it is not present, then a pin 1 identi?er must be located in th e index area indicated. the pin 1 identi?er can be: a molded mark/identi?er; an embedded metal marker; or a printed indicator. 1. downloaded from: http:///
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